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The ARM Cortex-A12 is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture. It provides up to 4 cache-coherent cores. The Cortex-A12 is a successor to the Cortex-A9.〔(【引用サイトリンク】title=ARM Cortex-A12 Processor )〕 ARM renamed A12 as a variant of Cortex-A17 since the second revision of the core in early 2014, because they were indistinguishable in performance. == Overview == (詳細はCortex-A9 core.〔(ARM launches new Cortex-A12 processor with new Mali-T622 GPU and Mali-V500 video processing )〕 New features not found in the Cortex-A9 include hardware virtualization and 40-bit Large Physical Address Extensions (LPAE) addressing. It was announced as supporting big.LITTLE,〔(ARM Targets 580 Million Mid-Range Mobile Devices with New Suite of IP )〕 however shortly afterwards the ARM Cortex-A17 was announced as the upgraded version with that capability. Key features of the Cortex-A12 core are:〔(【引用サイトリンク】title=Cortex-A12 Processor Specifications )〕 * Out-of-order speculative issue superscalar execution pipeline giving 3.00 DMIPS/MHz/core. * NEON SIMD instruction set extension. * High performance VFPv4 floating point unit. * Thumb-2 instruction set encoding reduces the size of programs with little impact on performance. * TrustZone security extensions. * L2 cache controller (0-8 MB). * Multi-core processing. * 40-bit Large Physical Address Extensions (LPAE) addressing up to 1 TB of RAM. * Hardware virtualization support. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「ARM Cortex-A12」の詳細全文を読む スポンサード リンク
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